Democratising hardware acceleration for AI with RISC-V and SYCL
The widespread adoption of AI has resulted in a market for novel hardware accelerators that can efficiently process AI workloads. Unfortunately, all popular AI accelerators today use proprietary hardware-software stacks, leading to a monopolisation of the acceleration market by a few large industry players. The EU-funded SYCLOPS project aims to democratise AI hardware acceleration by building on open standards. On the hardware front, researchers will promote the adoption of RISC-V, an open instruction set architecture based on established reduced instruction set computer (RISC) principles. On the software front, they will promote the adoption of SYCL, an open, cross-vendor, cross-architecture programming model. Standardised, AI acceleration enabled through SYCLOPS is expected to boost performance and scalability of extreme data analytics.