This paper outlines the initial FPGA-centric endeavors within the EdgeAI project, targeting scenarios where extremely constrained power-energy parameters intersect with the demand for high performance and accuracy in executing Artificial Intelligence (AI) algorithms. Our discussion revolves around the project objective of leveraging simultaneously event-based spiking neural networks and low-end FPGA chips for very-low-power near-sensor AI inference. We present the hardware/software implementation of this approach and the early results on some application cases.